TY - JOUR
T1 - Design and development of symmetrical super-lift DC-AC converter using firefly algorithm for solar-photovoltaic applications
AU - Albert, Johny Renoald
AU - Stonier, Albert Alexander
N1 - Publisher Copyright:
© The Institution of Engineering and Technology 2020.
PY - 2020/5/1
Y1 - 2020/5/1
N2 - The super-lift technique is an exceptional contribution to DC-DC conversion technology. A replacement approach of symmetrical super-lift multilevel inverter (SLMLI) DC/AC technology is proposed with a reduced number of elements compared with the traditional multilevel inverter. In this method, the firefly algorithm conveys a leading task for the SLMLI topology for solar-photovoltaic applications. It generates low distortion output and consumes the harmonic band of the fast Fourier transform framework by the employment of the proposed algorithm. The simulation circuit for 15 levels output uses single switch super-lift inverter feed with different kinds of load (R, RL and RLE) conditions. The power quality is improved in SLMLI with minimised harmonics underneath the various modulation indices while varied from 0.1 up to 0.8. The circuit is designed in a fieldprogrammable gate array, which includes the firefly rule to help the multilevel output, to reduce the lower order harmonics and to find the best switching angle. As a result, the minimum total harmonic distortion from the simulation and hardware circuit is achieved. Due to the absence of bulky switches, inductor and filter elements expose the effectiveness of the proposed system.
AB - The super-lift technique is an exceptional contribution to DC-DC conversion technology. A replacement approach of symmetrical super-lift multilevel inverter (SLMLI) DC/AC technology is proposed with a reduced number of elements compared with the traditional multilevel inverter. In this method, the firefly algorithm conveys a leading task for the SLMLI topology for solar-photovoltaic applications. It generates low distortion output and consumes the harmonic band of the fast Fourier transform framework by the employment of the proposed algorithm. The simulation circuit for 15 levels output uses single switch super-lift inverter feed with different kinds of load (R, RL and RLE) conditions. The power quality is improved in SLMLI with minimised harmonics underneath the various modulation indices while varied from 0.1 up to 0.8. The circuit is designed in a fieldprogrammable gate array, which includes the firefly rule to help the multilevel output, to reduce the lower order harmonics and to find the best switching angle. As a result, the minimum total harmonic distortion from the simulation and hardware circuit is achieved. Due to the absence of bulky switches, inductor and filter elements expose the effectiveness of the proposed system.
UR - http://www.scopus.com/inward/record.url?scp=85083363054&partnerID=8YFLogxK
U2 - 10.1049/iet-cds.2018.5292
DO - 10.1049/iet-cds.2018.5292
M3 - Article
AN - SCOPUS:85083363054
SN - 1751-858X
VL - 14
SP - 261
EP - 269
JO - IET Circuits, Devices and Systems
JF - IET Circuits, Devices and Systems
IS - 3
ER -
